The idea of AoB is similar to the idea of AiP. However, it relies on printed circuit board (PCB) technology to make an antenna (or antennas) on one surface of a board and to solder a packaged chip (or chips) on the other surface of the board. A few techniques, such as probe feeding or aperture coupling, are available to interconnect the packaged chip with the antenna. Of course, the antenna, the packaged chip, and the necessary feed networks can be contained on the same surface of the board. Recently, the idea of AoB has received considerable attention for millimeter‐wave (mmWave) fifth‐generation (5G) base stations [9].
A typical AIA consists of active devices such as Gunn diodes or transistors that form an active circuit and a planar antenna. The idea of AIA was proposed to eliminate the lossy and bulky interconnect between the active device and radiating element [10]. Later, the idea of AIA was employed for quasi‐optical power combining. The output power from an array of many solid‐state devices was combined in free space to overcome the power limitations of individual solid‐state devices at mmWave frequencies.
Although the origin of the above ideas can be traced back to the invention of microstrip antennas in the early 1970s [11], it should be noted that they extended the concept of microstrip antennas to different levels of integration.
1.3 Exploring the Idea
In this section, the early attempts to explore the idea of AiP are reviewed. It should be mentioned that researchers in university labs devoted their efforts regarding Bluetooth radios to 2.4 GHz or other RF applications, while researchers in company labs focused on 60‐GHz radios and other mmWave applications. At 2.4 GHz, a key challenge was how to miniaturize the antenna size, while at 60 GHz, it was how to minimize the interconnect loss between the die and antenna.
1.3.1 Bluetooth Radio and Other RF Applications
In 1998, Zhang started to work in the Division of Circuits and Systems at the School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore. The division soon initiated a strategic research project entitled “Software radio on a chip.” Zhang was tasked to develop an antenna technology for the project. Inspired by the structural similarity shared by a microstrip antenna and a microchip, shown in Figure 1.3, and foreseeing the outcome of an interesting antenna solution, Zhang immediately started to investigate the antenna performance of the microchip. First, Zhang did antenna experiments with used microchips, as shown in Figure 1.4a. Then, Zhang tried PCB mock‐ups, as shown in Figure 1.4b. Encouraged by good antenna results from the microchips and PCB mock‐ups, the research team led by Zhang realized more sophisticated designs, as shown in Figure 1.4c,d, with low‐temperature co‐fired ceramic (LTCC) technologies in 2004 [12]. It is interesting to note that differential microstrip patch and meander antennas were designed to suit high‐level integration of wireless SoCs. They were integrated on the top surfaces of two ball grid array (BGA) packages. Both packages had cavities to house wireless SoC dies. The interconnects from the die to the antenna were cascaded bond wires, traces, and vias. The interconnected die was encapsulated with epoxy.
In 2000, Song et al. at University of Birmingham presented an integrated antenna package [13]. An electrically small feed antenna was designed on a semiconductor substrate, which also supported the RF front‐end circuits. The parasitic radiator placed above the feed antenna also acted as a top cover, sealing the entire package. Later, Song et al. presented another integrated antenna package [14]. A small antenna was embedded within the chip encapsulating material. A parasitic radiator was placed in close proximity to the embedded antenna, where it enhanced the poor gain and bandwidth of the packaged antenna.
In 2001, package engineers started to tackle the same problem. Lim et al. at the Georgia Institute of Technology managed to integrate RF passives, a patch antenna, and chips at the package level to enhance the overall performance of and to add more functionalities to an SoP paradigm [15]. Mathews et al. disclosed a package with an integral shield and antenna for a complete Bluetooth radio design [16].
In 2003, Ryckaert et al. at the Interuniversity Microelectronics Center, Belgium reported the co‐design of circular‐polarized slotted patch antenna with a wireless local area network (WLAN) transceiver in a multilayer package [17]. Popov et al. at the Institute of Microelectronics, Singapore reported the design of part of an RF chip package as a dielectric resonator antenna with a high dielectric constant when the antenna feed was integrated with the rest of the circuitry [18]. Leung at City University of Hong Kong independently proposed adding the chip package function to a dielectric resonator antenna in 2004 [19].
In 2005, Castany et al. at Fractus, Spain filed a patent about the integration of fractal antennas in a chip package [20]. They claimed that fractal antennas could provide very good antenna performance while allowing a high degree of miniaturization and an enhancement of isolation between the antenna and the die in the package.
In 2006, Brzezina et al. at Carleton University reported planar antennas with transceiver integration capability for ultra‐wideband (UWB) radios [21]. Sun et al. devised a novel technique that reduces the size of a conventional planar antenna by 40% and used it as a package to house a single‐chip UWB radio [22].
In 2007, Wi et al. at Yonsei University, Korea presented an antenna‐integrated package [23]. A modified U‐shaped slot antenna was designed and measured, showing bandwidth of 180 MHz at 5.8 GHz. A parametric study was conducted with a full‐wave electromagnetic solver to determine the critical factors in design and fabrication, as well as to estimate the performance accuracy of the antenna‐integrated package.
1.3.2 60‐GHz Radio and Other Millimeter‐wave Applications
In early March 2005, Zhang met Brian P. Gaucher and Duixian Liu from the IBM Thomas J. Watson Research Center for the first time at the First International Workshop on Small Antenna Technology in Singapore and invited them to visit Nanyang Technological University. Gaucher gave a talk about the IBM 60‐GHz radio SiGe chipsets, antennas, packages, and measurement setup. Figure 1.5 shows the chip‐scale package for proof of concept [24]. The chip‐scale package had a size of 13 × 13 × 1.25 mm3. Note that the radio dies were flip‐chip bonded with the antennas and assembled together as an land grid array (LGA) package. The package required a dedicated opening for an antenna and an encapsulation prior to the mounting of the antenna. Thus, it was difficult to fabricate and assemble this chip‐scale package for mass production. With that in mind, Zhang briefed the visitors about antennas designed for 2.4 and 5 GHz as chip packages in LTCC, and a collaboration plan for a feasibility study for developing LTCC packages embedded with antennas for the IBM 60‐GHz radio SiGe chipset was agreed. Zhang paired up with Mei Sun to lead the design