Figure 2.4. The quantum Fredkin gate.
Figure 2.5. Swapping of the quantum Fredkin gate.
2.3 Garbage outputs
In a quantum gate the number of outputs must be equal to the number of inputs. As a consequence, there are usually some outputs which are not required further. They are called garbage outputs. Each garbage output incurs a heavy price. In figure 2.1, the output ∣A〉 is the garbage output for the CNOT quantum gate.
2.4 Constant inputs
Constant inputs are the inputs which are added to a function to make the one-to-one mapping between inputs and outputs. For example, to perform the adder operation using a double Peres gate (DPG) quantum circuit, the C input bit in figure 2.6 has to remain 0 and this input is called the constant input.
Figure 2.6. Quantum realization of the DPG circuit.
2.5 Area
The area of a gate is defined by the circuit size. This size varies according to the number of quantum gates of the circuit. As the basic quantum gates are fabricated with quantum dots with size ranging from several to tens of nanometers (10−9 m) in diameter, the size of basic quantum gates ranges from 50 Å–300 Å. The angstrom (Å) is a unit equal to 10−10m (one ten-billionth of a meter) or 0.1 nm. Its symbol is the Swedish letter Å. Quantum circuits can be implemented with the basic quantum gates and the quantum cost of a gate depends on the number of basic quantum gates needed to implement it. Thus the area of a gate can be defined as follows: A=Nq×Sq, where A= area, Nq = the number of quantum gates, and Sq = the size of basic quantum gates. According to the circuit size, the area of the quantum Toffoli gate is ((50 × 5) Å – (300 × 5) Å) = (250 Å – 1500 Å), where the number of quantum gates of the quantum Toffoli gate is five.
2.6 Power
The power of a gate is defined by the energy consumed. The energy of basic quantum gates is 142.3 meV (micro-electronvolts). Quantum circuits can be implemented with basic quantum gates and the quantum cost of a gate depends on the number of basic quantum gates needed to implement it. Thus the power of a gate can be defined as follows, for example: the energy of the Toffoli gate is (5 × 142.3) meV = 711.5 meV, where the number of quantum gates of the quantum Toffoli gate is five.
2.7 Delay
The delay represents the critical delay of the circuit. In delay calculations, the logical depth is used as the measure of the delay. The delays of all 1 × 1 and 2 × 2 quantum gates are taken as the unit delay, designated by Δ. Any quantum gate can be designed from 1 × 1 and 2 × 2 quantum gates, such as the CNOT, controlled-V, or controlled-V+ quantum gates. Thus, the delay of a quantum gate can be computed by calculating its logical depth when it is designed using smaller 1 × 1 and 2 × 2 quantum gates. Each 2 × 2 quantum gate in the logic depth contributes to 1Δ delay. For example, the quantum Toffoli gate requires a 5Δ delay, as shown in figure 2.3.
2.8 Depth
The depth of a quantum circuit is the maximum number of stages or slices where each stage or slice represents a quantum gate or a number of quantum gates along the same vertical line.
A quantum circuit is constructed using different quantum gates. These quantum gates are placed in different input lines. To find the depth of any quantum circuit, it is necessary to divide it into some slices. There may be more than one quantum gate in any slice. The maximum number of slices is considered as the depth of that quantum circuit. For example, consider the Thapliyal Ranganathan (TR) gate-based half subtractor, shown in figure 2.7. This quantum circuit needs four quantum gates to be implemented. Now, to find the depth of this circuit, it will be divided into stages according to the quantum gates. The vertical lines are used to split the circuit into slices. In the first slice there is a controlled-V+ gate, in the second slice there is a CNOT gate, and in the third and fourth slices there are controlled-V gates. This circuit has a maximum of four slices, as numbered in the figure. Thus it can be said that the depth of the circuit is 4.
Figure 2.7. Illustration of the depth of a quantum circuit.
2.9 Quantum cost
The quantum cost of a quantum circuit is the number of basic quantum gates in the circuit. Quantum cost is an important measure of the performance of a quantum circuit. The quantum cost of the basic quantum gates, such as the NOT, CNOT, controlled-V, and controlled-V+ gates, is considered to be 1. The quantum circuit in figure 2.7 consists of four basic quantum gates and thus the quantum cost of this circuit is 4.
2.10 Quantum gate calculation complexity
The quantum gate calculation complexity refers to the number of quantum gates (NOT, CNOT, controlled-V, and controlled-V+) used to synthesize a given circuit, with ρ being the NOT quantum gate calculation complexity, σ the CNOT quantum gate calculation complexity, and Ω the controlled-V (controlled-V+) gate calculation complexity. For example, the DPG quantum circuit has two CNOT quantum gates and four controlled-V (controlled-V+) gates. Therefore, the quantum gate calculation complexity of the DPG quantum circuit is 2σ + 4Ω, which is depicted in figure 2.6.
2.11 Summary
Quantum gates and quantum networks offer a very useful language for constructing any quantum computer or (basically the same) quantum multi-particle circuits. Now, the question is whether it it possible to build quantum logic gates or not?
Single-qubit quantum gates are viewed as comparatively easy to implement. For example, a classic quantum optical realization uses elements as qubits and switches their states with laser light pulses of appropriately selected frequency, strength, and duration; any recommended superposition of two selected logical states can be prepared this way.
Research into quantum computation and all of its possible variations has become vigorously active and any comprehensive review of the field cannot help but be obsolete as soon as it is written. Here, only some of the very basic knowledge has been provided, hoping that this will serve as a good starting point to enter into the field.
Further reading
[1] Oxford quantum http://oxfordquantum.org/ (Accessed: 5 December 2018)
[2] Balandin A A and Wang K L 1999 Implementation of quantum controlled-not gates using asymmetric semiconductor quantum dots Quantum Computing and Quantum Communications (Berlin: Springer) pp 460–7
[3] Landaurer R 1961 Irreversibility and heat generation in the computational process IBM J. Res. Dev. 5 183–91
[4] Li X, Steel D, Gammon D and Sham L J 2004 Quantum information processing based on optically driven semiconductor quantum dots Opt. Photon. News 15