Introduction
The limit of energy dissipation during computation is fundamentally based on the apparent thermodynamic paradox of Maxwell's demon. Maxwell described the system as follows:
For we have seen that the molecules in a vessel full of air at uniform temperature are moving with velocities by no means uniform, though the mean velocity of any great number of them, arbitrarily selected, is almost exactly uniform. Now let us suppose that such a vessel is divided into two portions, A and B, by a division in which there is a small hole, and that a being, who can see the individual molecules, opens and closes this hole, so as to allow only the swifter molecules to pass from A to B, and only the slower ones to pass from B to A. He will thus, without expenditure of work, raise the temperature of B and lower than that of A, in contradiction to the second law of thermodynamics.
The demon has been depicted in various ways. Some show the demon inside the chamber with gas, some have it outside. Any analysis must be sure to include the thermodynamic effects within the demon itself in the energy and entropy accounting. Some images give the demon a light source to aid in measurement of the particles speed, indicating the lack taken by some authors to explain the paradox of attributing the entropy increase to dissipation during measurement.
Szilard, nearly 60 years after Maxwell first postulated the demon, attempted to resolve the paradox by arguing that the process of measurement required dissipation. Although he did notice entropy generation of
This book is divided into three parts, namely (i) Reversible Circuits, (ii) Fault‐Tolerant and Online Testable Circuits, and (iii) DNA Computing. The first part starts with some backgrounds and preliminary studies about reversible logic synthesis and some popular reversible gates. Then many of the reversible gates are included in different chapters. Some approaches of designing different reversible adders and subtractor circuits, signed multiplier, sequential division circuit, low power n‐bit binary comparator, reversible latches and flip‐flops, n‐bit synchronous and asynchronous counter, barrel shifter, shift register, field programmable gate array (FPGA), programmable logic array (PLA), random access memory (RAM), programmable read‐only memory (PROM), the arithmetic logic unit (ALU) implementation and finally, the control unit is presented.
The second part is divided into two types of contents; namely reversible fault‐tolerant circuits and reversible online testable circuits. In fault‐tolerant part, some backgrounds and preliminary studies about reversible fault‐tolerant logic gates are included in different chapters. Some approaches of designing different reversible fault‐tolerant adders, multiplier circuit, floating‐point division circuit, decoder, shifter and rotator techniques, programmable logic devices (programmable logic array, programmable array logic and field programmable gate array) and finally, arithmetic logic unit (ALU) with its QCA implementation are described. In addition, online testable part describes the realization of reversible circuits using NAND blocks and designs of some reversible online testable circuits.
The third part is also divided into two parts, namely general or irreversible DNA and reversible DNA. In irreversible DNA, some backgrounds and preliminary studies about DNA and a DNA‐based approach of microprocessor design automation are shown. In reversible DNA, some DNA‐based reversible gates as well as reversible circuits, reversible addition and subtraction mechanism, reversible shifting and multiplication techniques and finally reversible multiplexer and ALU are presented.
Part I Reversible Circuits
An Overview About Reversible Circuits
The number of output bits is relatively small compared to the number of input bits in most computing tasks. For example, in a decision problem, the output is only one bit (yes or no) and the input can be as large as desired. However, computational tasks in communication, computer graphics, digital signal processing, and cryptography require that all the information encoded in the input should be preserved in the output. One might expect to get further speed‐ups by adding instructions to allow computation of an arbitrary reversible function. The problem of chaining such instructions together provides one motivation for studying reversible computation and reversible logic circuits, that is, logic circuits comprising of gates computing reversible functions.
Reversible logic is an emerging research area. Interest in reversible logic is sparked by its applications in several technologies, such as quantum, CMOS, optical and nanotechnology. Reversible implementations are also found in thermodynamics and adiabatic CMOS. Power dissipation in modern technologies is an important issue, and overheating is a serious concern for both manufacturer (impossibility of introducing new, smaller scale technologies, limited temperature range for operating the product) and customer (power supply, which is especially important for mobile systems). One of the main benefits that reversible logic is theoretically zero power dissipation in the sense that, independently of underlying technology, irreversibility means heat generation.
Reversible circuits are also interesting because the loss of information associated with irreversibility implies energy loss. Some reversible circuits can be made asymptotically energy‐lossless as their delay is allowed to grow arbitrarily large. Currently, energy losses due to irreversibility are dwarfed by the overall power dissipation, but this may change if power dissipation improves. In particular, reversibility is important for nanotechnologies where switching devices with gain are difficult to build.
The advancement in higher‐level integration and fabrication process has emerged in better logic circuits and energy loss has also been dramatically reduced over the last decades. This trend of reduction of heat in computation also has its physical limit. It is well understandable that in logic computation every bit of information loss generates
