Figure 1.20 (a) Switched‐capacitor and (b) switched‐inductor cells.
Figure 1.21 Structure of PWM converters used in the derivation procedure.
Figure 1.22 Possible positions of the inductor in a second‐order PWM converter based on 1L converter cell.
In the above discussed approaches, the converters are derived or synthesized based on cell or component levels. They select a proper converter configuration and add certain cell or component to the converter to form a new converter topology. Essentially, they exhaustively enumerate all of possible combinations and extract converters based on certain constraints or properties. Valid converters are verified with the volt‐second balance principle. Applications of these approaches to developing new converters are quite limited because the chance of obtaining a valid converter is depending highly on experience. Is it possible to start from valid converters and with certain manipulation to develop new converters? To answer this question, several viable approaches are briefly discussed.
The three well‐known valid PWM converters, buck, boost, and buck‐boost, are shown in Figure 1.7. With a synchronous switch technique, the buck‐boost converter can be derived from buck and boost converters in cascade connection. The derivation procedure is illustrated in Figure 1.23, in which the buck and boost converters in cascade connection is shown in Figure 1.23a. Without considering ripple current, it can be proved that capacitor C1 can be eliminated, and inductors L1 and L2 are just connected in series to become L12, as shown in Figure 1.23b. If switches S1 and S2 are synchronized and have identical duty ratio, the active–passive switch pairs, S1&D1 and S2&D2, can be replaced with two single‐pole double‐throw (SPDT) switches, as also shown in Figure 1.23b, in which node “A” corresponds to an active switch and node “B” is to a passive switch. Thus, the circuit shown in Figure 1.23b can be simplified to that shown in Figure 1.23c, and the two switch pairs can be combined to S12. Replacing the switch pair with an active switch and a passive one yields the buck‐boost converter shown in Figure 1.23d. Note that at the output of Figure 1.23b, the positive polarity is located at the upper node, while that in Figure 1.23c and d, the positive polarity is in the lower node. How to determine the polarity is not straightforward. And it usually needs several words to explain the polarity transition. Similarly, the Ćuk converter that can be proved to be a cascade connection of boost and buck converter can be also derived with the same procedure. Again, the change of output polarity needs extra explanation, and it is not so obvious and convincible.
Figure 1.23 Evolution of the buck‐boost converter from the buck and boost converters with a synchronous switch technique.
The derivation procedure based on the synchronous switch technique is so far only applied to two switch pairs, because its combination of switch pairs, location of inductor/capacitor, and determination of output voltage polarity are not straightforward. This approach is essentially based on a preliminary observation of converter operation and configuration, but it lacks of principle or mechanism in decoupling and decoding PWM converters. Thus, it cannot be extended to derive other PWM converters, such as the sepic and Zeta converters shown in Figure 1.8b and c.
Based on the synchronous switch concept, the graft switch technique (GST) was proposed. Instead of starting from converter manipulation, the GST starts to deal with how to graft two switches operated in unison or synchronously and with at least a common node, from which four types of grafted switches are developed, as shown in Figure 1.24. They are T‐type, inverse T‐type, Π‐type, and inverse Π‐type grafted switches, which can be used to integrate the active switches in the converters. An illustration example in deriving the buck‐boost converter is shown in Figure 1.25. Again, the buck and boost converters in cascade connection shown in Figure 1.23a is still adopted. After simplifying the L1C1L2 filter, we can obtain a circuit shown in Figure 1.25a. By exchanging the connection of source Vi and switch S1, we can create a common D–S node for switches S1 and S2, as shown in Figure 1.25b. Then, we replace S1 and S2 with a Π‐type grafted switch S12, as shown in Figure 1.25c. Since the currents through switches S1 and S2 are identical when they are operated in unison, the two circulating‐current diodes DF1 and DF2 can be removed from the Π‐type grafted switch, and the circuit becomes the one shown in Figure 1.25d. Note that detailed explanation for the diode degeneration will be presented in later chapter. From the circuit shown in Figure 1.25d, we can recognize that diodes D1 and D2 are just in series connection, and they can be replaced with a single one D12, as shown in Figure 1.25e. By redrawing the circuit, we can have the one shown in Figure