Liquid Crystal Displays. Ernst Lueder

2.10. In a colour display, the glass plate facing the viewer carries the pixellized colour filter, shown in Figure 2.14. The pixels for red, green and blue are covered with a compound which absorbs all wavelengths originating from the white backlight besides red, green and blue, respectively. The saturation of the colours is individually controlled for each pixel by the voltage V_LC in the same way as for grey shades.

      The geometrical arrangement of the colour pixels in triangles in Figure 2.14(a) and along diagonals in Figure 2.14(c) are recommended for moving TV pictures, whereas the colour stripes in Figure 2.14(b) are preferred for computer displays often presenting rectangular graphs.

The cross-section of a colour filter in Figure 2.15 contains the colour materials for R, G and B, an absorptive layer with a low reflection in between the pixels, a so-called black matrix, an overcoat layer and, in the case of TFT addressing, an unpixellized ITO electrode over the entire display area. For other addressing schemes, the ITO layer is no longer unstructured. The ITO electrode on the TFT-carrying plate is pixellized. The black matrix prevents light between the pixels, which is neither controlled by the voltage V_LC at the ITO electrodes nor exhibits the desired colour, from seeping through the cell. This light would lighten up the black state, and would thus degrade contrast and the saturation of colour. A suitable material for a black matrix is an organic material with carbon particles exhibiting a reflectivity of only 4 percent, whereas the previously used Cr-oxide has a reflectivity of 40 percent. The overcoat layer (e.g. out of a methacrylate resin solution) equalizes the different heights of the colour pixels and protects them.

Figure 2.14 The geometrical arrangement of colour pixels for red R, green G, and blue B (a) in triangles, (b) in stripes and (c) in diagonal form

Figure 2.15 Cross-section of a colour filter for TFT addressed LCDs

       2.2.2 The addressing of LCDs by TFTs

So far we know that we have to control the grey shade individually in each pixel by applying the appropriate pixel voltage V_LC, but by only using the external contact pads in Figure 2.9. The TFT-addressed LCD, usually called an Active Matrix LCD (AMLCD), solves this task as depicted in Figure 2.16. It shows two pixels of a row of pixels, with the row- and column- conductors and ground represented by the unstructured ITO electrode on the colour plate in Figure 2.15. The TFTs are n-channel Field Effect Transistors (FETs) fabricated with thin film technology. They operate as switches in the pixels. All TFTs in a row are rendered conductive by a positive gate impulse V_g. TFTs in other rows are blocked by grounding the rows. The video information is fed in through the columns and the conducting TFTs into all the pixels of a row simultaneously. More specifically, the video voltage V_d corresponding to a desired grey shade charges the LC-capacitor C_LC and an additional thin-film storage capacitor C_s up to the voltage V_d. This constitutes an amplitude modulation. The operation addresses one line at a time, as opposed to one pixel at a time, of the e-beam in CRTs. During the charging time, the storage capacitor connected to the succeeding line n + 1 is grounded, and hence connected in parallel to C_LC. As this is no more true during other phases of the operation, degradations of the addressing waveform are introduced, as discussed later.

      The pixel switches have to charge N rows in the frame time T_f in which a picture is written. Hence, the row-address time is

      (2.17)

The waveform of the pixel-voltage V_LC is depicted in Figure 2.17. In the time T_r, the storage capacitors are charged with the time constant

(2.18)

      where R_on is the on-resistance of the TFT. The inequality guarantees that at the end of T_r, the voltage V_LC is only 1 percent below the desired voltage V_d in Figure 2.16. The TFTs need to be fast enough to make sure that even if their properties fluctuate, as indicated by dashed lines in Figure 2.17, they still charge the capacitors to the voltage V_d. After the time Tr, the transistor is blocked, but still has a finite off-resistance R_off. After T_f the row is addressed again and the new picture information is fed in. During this time, the discharge of the capacitors should be small to provide a luminance as constant as possible. This yields an almost flicker-free picture, again as opposed to the CRT, where in the absence of storage the luminance of the phosphor decays after having shortly been hit by the e-beam. The constraint for the time constant ^T_off of the discharge is

Figure 2.16 TFT addressing of the pixels in a row

Figure 2.17 Waveform of the voltage across a pixel during charging and discharge of the storage capacitor

(2.19)

which ensures a voltage drop of only 1 percent at T_f. From Equations (2.18) and (2.19), we obtain

(2.20)

For an NTSC display with N= 484, we require R_off/R_on ≥ 968 × 10³. With the practically achievable value for the off-current I_off=